1. Field of the Invention
This invention relates to a method for automated analysis and hierarchical graphical presentation of application results.
2. Description of Background
Chip design, such as very-large scale integration (“VLSI”) chip design, is highly market driven. This forces the development cycles to be very short and high productivity in the development process is necessary. A chip consists of a number of design parts. The number of design parts varies, but for large processor chips the number of design parts is up to several hundreds. Usually there is a least one hierarchy level, i.e., several design parts add up to a so called ‘unit’ and several units add up to the chip. During the development process, all design parts of a chip have to pass a number of checking tools or applications. Similarly, all units need to pass a different set of checking tools or applications. The required tool or application set may be specified by a design guide, which has been chosen to manufacture the chip. In some cases, the number of tools or applications that need to be run can range up to several dozen.
Each of the tools or applications that are run on each level of the development process may create a report summary or log file. Currently, there exists no report summary or log file generation dependency between the different tools or applications. Many times the design guide specifies the data formats of the design parts throughout the design process. Therefore, chip designers and project management must keep track of the results of each of the checking tools or applications. Because a chip may only be sent to manufacturing if it passes all of the required checking tools or applications, the number of tools or applications necessary for a chip (from beginning to end) may be the number of design parts times the number of checking tools or applications required.
The traditional report generation is based on log files which are plain text files. The syntax and wording in the log files may differ because, for example, different applications are written by different programmers who may be spread in different departments and use different programming languages or applications may be used in several chip design projects concurrently with different environment setups.